MR1 
compact ss-nanopore R&D device
electronics summary
- Overall Purpose: The board is designed to measure extremely small currents (in the picoampere to microampere range) through a nanopore (from < 1 nm to ~100 microns in diameter), which allows for raw signals from analytes across several orders of magnitude.
- PCB Specifications:
- Four-layer PCB design
- FR-4 material as an option
- Designed for low-noise, high-precision measurements
- Microcontroller:
- ESP32-S3 NodeMCU
- Controls all aspects of the device
- Handles data processing, communication, housekeeping, and end-user applications
- Analog Front-End:
- LMP7721 ultra-low input bias current amplifier
- Serves as the primary current-to-voltage converter (transimpedance amplifier)
- Crucial for measuring tiny currents through the nanopore
- Analog-to-Digital Converter (ADC):
- MAX11169 16-bit ADC
- Capable of up to 500 ksps, but likely operated at lower speeds (10-100 ksps) for better noise performance
- Digital-to-Analog Converter (DAC):
- MCP4822 dual-channel DAC
- Used for generating precise voltages to apply across the nanopore
- Second channel used to provide short pulses of 9V+
- Power Management:
- Multiple AMS1117 voltage regulators
- Provides +5V, -5V, and +3.3V supply voltages
- Relays for power control and possibly for switching between different modes
- Battery Management:
- Designed for six rechargeable batteries
- Battery charging circuit not explicitly shown in the provided schematics
- Signal Chain and Voltage Generation:
- ESP32 → MCP4822 DAC → TL3541 op-amp → Nanopore for applying controlled voltage
- Nanopore current → LMP7721 preamp → Filtering → MAX11169 ADC → ESP32 for processing
- PCB Layout Considerations:
- Careful separation of analog and digital sections
- Extensive use of ground planes for shielding
- Short, direct connections for sensitive analog paths
- Uses star-ground topology to minimize noise
- Noise Reduction Techniques:
- Use of ultra-low noise components (e.g., LMP7721)
- Proper shielding and grounding
- Separate analog and digital power supplies
- Partial implementation of active guarding techniques, with provisions for future expansion
- Additional Features:
- LED control circuitry for visual indicators or illumination (requires 4 more pogo pins per unit—will ship as part of additional flow cells)
- Multiple test points for debugging and testing
- External connections via onboard WiFi
- Power Supply:
- Powered by six rechargeable batteries
- Multiple voltage rails: +5V, -5V, +5V_digital
- +3V3 supplied by the regulator onboard the ESP32 module
- Sampling Rate:
- Adjustable 10-125 ksps for raw current measurements
- Based on experimental needs and noise considerations
- Interfaces:
- WiFi control via web-based interface
- PCB Layers:
- Top Layer (Signal 1): Main signal routing and components
- Inner Layer 1: Ground plane
- Inner Layer 2: Power distribution
- Bottom Layer (Signal 2): Additional routing and larger power traces
- Special Considerations:
- Fluid cell connections for the nanopore
- Includes Ag/AgCl electrodes
- Faraday cage integration for shielding (external to PCB)
- Areas for Improvement (MR1 v1.1):
- Addition of flyback diodes for relay protection
- Implementation of a proper battery charging and management system
- Possible addition of temperature monitoring for drift compensation
- Fine-tuning for noise and lower current ranges
- Software Aspects:
- ESP32 firmware for control, data acquisition, and processing
- Will include basic digital filtering and signal processing algorithms
- Will include real-time data visualization and basic analysis (spike calling) at minimum